Single Electron Encoded Logic Circuits
نویسندگان
چکیده
In this paper we investigate single electron tunneling (SET) devices from the logic design perspective, using the SET tunnel junction’s ability to control the transport of individual electrons. More in particular, we investigate the behavior of a family of single electron encoded logic (SEEL) gates, consisting of a 2-input AND gate, a 2-input OR gate and a NOT gate, and simulate the gates. A charge amplifier is applied at the gates’ output in order to enhance them such that they can accommodate fanout and the resulting combined gates are simulated. We demonstrate the ability of the resulting gates to accommodate for fanout by simulating a small network containing AND, OR and NOT gates. Keywords—single electron tunneling; SET; single electron encoded logic; SEEL; logic circuits.
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